Makefile Guide-Line

To simplify the source files managment insede the Makefileit is usefull to adopt multiple targets and static patterns

Define Variables

define a variable containig the list of the name of all the source files
src_file = \
symbol.c \
init.c \
intrinsic.c \
lexan.c \
stackmachine.c
  • defing the object files name from the above using a substitution
...
obj_files = $(src_file:.c=.o)
...

Static Pattern

It necessary to build targets extracting target name from the list variable. Two different approach have to be used if the target it is and intermediate "object" file needing to be compiled alone:
  • if the associated compiler command hasn't the "=-c=" option (clarifications can be found here)

#
#   Object Project
#
$(obj_files) : $(src_file) $(hdr_file)
...
  • if the compiler command has the "=-c=" option *static pattern rules" ahve to be used (see manual here)
#
$(obj): %.o : %.for $(hdr_file2)
...

-- RobertoBernetti - 08 Feb 2010
Topic revision: r1 - 24 Feb 2017, UnknownUser
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